Skip to main content
Fig. 5 | EURASIP Journal on Information Security

Fig. 5

From: ASIC implementation of random number generators using SR latches and its evaluation

Fig. 5

Experimental system for the acquisition of random numbers. Our experimental system consists of two boards: a custom-made board for the ASICs of the TRNGs and a Spartan-3E starter kit board with a Xilinx FPGA for controlling the TRNGs. Random numbers generated by the TRNGs were written to a micro SD card via a block RAM and SD writing module on an FPGA board. We acquired not only the random numbers but also the output of each latch

Back to article page